The counter type analog-to-digital converter is a simple ADC, also known as a staircase or ramp analog-to-digital converter. As its name suggests, it uses a binary counter for the conversion of analog signals. The schematic consists of a comparator, counter, digital-to-analog converter, a control circuit, an AND gate, and output latches.
The article provides an introduction to the counter type ADC’s workings, advantages, and disadvantages.
Why is Counter ADC also called Ramp ADC?
The counter type ADC also has another name, which is digital ramp analog to digital converter, because the output of the counter passes through the digital-to-analog converter. Whenever the binary counter increments its count, the digital-to-analog converter increases in the form of a ramp, where the ramp waveform looks like a staircase.
Main Components of Counter Type ADC
The following are the main components of a ramp-type analog-to-digital converter circuit:
Counter type ADC Working
This section will provide an understanding of the working principles of the counter type analog-to-digital converter.
The input voltage connects to the positive, or non-inverting, terminal of the comparator, while the negative, or inverting, terminal connects to the output of the digital-to-analog converter. The output of the binary counter is passed as an input to the DAC.
At the beginning of the conversion, the counter is reset and set to zero. Due to this, the output of the digital-to-analog converter also equals zero. Initially, the given input voltage is higher than the output DAC voltage, which satisfies the condition for the comparator’s high state. So, the output of the comparator is high. The comparator is followed by an AND gate, which gives clock pulses to the counter for its operation. When the output of the comparator is pulled high, the AND gate applies clock pulses to the counter. Because of this, the counter starts counting. Since the counter keeps on incrementing its count, the output of the digital-to-analog converter also increases in a staircase fashion. This DAC output is constantly compared with the input voltage.
When Vin > Vdac
As long as the input voltage is greater than the output DAC voltage, the output of the comparator is high, and the counter is provided with clock pulses to perform counting. As a result, the digital-to-analog output increases slowly in a staircase manner.
When Vin < Vdac
When the digital-to-analog converter’s output voltage is greater than the input voltage, the state of the comparator becomes low. No pulse will be applied to the counter. Instead, the low output of the comparator goes to the control circuit, which latches the output of the counter, and the counter gets reset. So, we conclude that the latched output is directly proportional to the input voltage. This is the whole procedure, and after completion, the input voltage is again sampled and initiates a new conversion. The counter resets for every new conversion, i.e., it starts counting from zero onward in every conversion.
The analog-to-digital conversion time is dependent on the magnitude of the input voltage. The greater the applied voltage, the more time the analog-to-digital converter takes for the analog data conversion.
Counter ADC Graphical Representation
The following figure shows the typical conversion pattern of the counter type ADC:
It is clearly visible that the output of the counter type digital-to-analog converter increases until it reaches the input voltage. As it crosses the magnitude of the input voltage, the counter resets, and the next conversion begins. The green bar determines the time taken by the analog-to-digital converter for one conversion. We can also see that in the part where the input voltage is increased, the conversion time has also increased.
Counter Type ADC Time
It is the time taken by the analog-to-digital converter to completely transform the analog input into a digital output.
The general formula for the maximum conversion time is:
Tc (max) = (2 ^ N – 1) Tclk
Where N is the number of bits in the analog-to-digital converter and Tclk is the duration of the clock pulse.
For example, if N = 4 bits and Tclk = T, then the maximum conversion time is:
Tc (max) = (2^4 -1) T
Tc (max) = 15T
The input voltage becomes equal to the full-scale output voltage of the DAC if all the input bits are 1. For this, the counter takes 2^N -1 clock pulses to reach from all zero bits to all one bits.
This conversion time equation shows its dependency on the resolution and clock frequency. The resolution of this ADC type is based on its DAC. If the number of bits in the digital-to-analog converter increases, the resolution of the counter type ADC increases, which ultimately increases the conversion time. So there is a trade-off between resolution and conversion time.
An increase in clock frequency can reduce the conversion time, but it is also limited by the response time of the components of the analog-to-digital converter.
- It is a simple and easy-to-function integrated circuit.
- It is cost-effective.
- It is a slow analog-to-digital converter because the converter resets itself for every new conversion.
- It is not suitable for high-resolution systems.
|Digital Frequency Measurement||Data Acquisition Systems|
|Automatic Test Equipment||Control Systems|
|Communication Systems||Voltage to Frequency conversion|
In conclusion, this tutorial provides an in-depth overview of counter type ADCs. It covers the introduction, its waveforms, its main components, working principles, and graphical representations. This also has advantages, disadvantages, and applications for cover type ADC. Hopefully, this was helpful in expanding your knowledge of the types of ADC.
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