# R-2R Ladder DAC – Explained with Example Circuit Diagram

The binary-weighted DAC is appropriate for DAC with low resolving power. This is because it requires a wide range of precise resistors to perform error-free operations for high-order DACs. It is impossible to maintain the accuracy of the weighted DACs and is expensive. This leads to the R-2R ladder technique that implements only two resistors for DAC functionality for every digital bit.

This post is a brief guide on R-2R DAC and shows why the latter is better than the binary-weighted DAC that we have discussed in the previous articles.

R-2R configuration is a simple arrangement that consists of parallel and series resistors connected in the cascaded form to an operational amplifier. An Operational amplifier can be used in inverting or non-inverting form depending on the polarity of output voltage that we want to get from DAC. R-2R Ladder resistors act as voltage dividers along with the entire network with the output voltage dependent on the input voltages.

The ladder arrangement consists of two resistors i.e. a base resistor R and a 2R resistor which is twice the value of the base resistor. This feature helps to maintain a precise output analog signal without using a wide range of resistor values.

A pair of R and 2R is used for one input bit. The digital inputs are provided through binary switches connected to Vref for input as 1 and GND for input 0.

### 3-bit R-2R Ladder DAC Circuit

Let us understand the concept through a 3-bit R-2R Ladder DAC. The following diagram shows the R-2R 3-bit ladder DAC. The leftmost side of the circuitry has the least significant bit i.e B0 whereas B2 which is the most significant bit is connected to the right side of the circuit to the amplifier. The binary inputs are given through the binary switches. So, when we need a high bit, the concerned bit is connected to the reference voltage and when a low bit is needed, the switch gets connected to the ground potential.

## R-2R Ladder DAC Analysis with Thevenin Theorem

The circuit is simplified to obtain the voltage contribution of each bit. It can be accomplished using Thevenin’s theorem.

Thevenin’s theorem is a technique through which we can obtain an equivalent circuit of the concerned resistance network. A Thevenin circuit consists of a Thevenin resistance and a Thevenin voltage that can be replaced in the circuit and work the same as the original resistance network.

As we need a Thevenin resistance and a Thevenin voltage for substitution, RTh is calculated by short-circuiting all the voltage sources and replacing the current sources with open circuits. VTH is the no-load output voltage and is entirely dependent on the position of the input switches. The original circuit is then replaced by the Thevenin circuit and the total output voltage of a 3-bit R-2R ladder network is acquired by considering only one high bit at a time and summing the individual voltages of each bit using superposition to obtain the transfer function of the DAC.

### When LSB is high

Let us first consider the binary code 001. Its  VTh and RTh will be calculated in three stages.

The first stage measures the VTh and RTh of the dotted block. The dotted block is separately shown in the right figure. We can see that it is just a voltage divider circuit. So, Vth is calculated using the formula

```VTh= 2R x Vref / 2R+2R
VTh=Vref / 2```

For measuring the Thevenin resistance, short circuit the reference voltage. Two resistances 2R and 2R become parallel to each other. So,

```RTh=2R || 2R
RTh=R```

Below is the equivalent circuit of the original after simplifying the first stage. The Thevenin equivalent of the first stage is connected in series to the rest of the circuit.

Now, we calculate the Thevenin circuit of the second stage. The dotted block will be solved in the second stage. Two resistors of the same value i.e R are connected in series. So it is replaced by equivalent resistance 2R shown in the given diagram below. The circuit is again configured to be a voltage divider with reference voltage as Vref/2. So,

```VTh= (2R x Vref/2) / 2R+2R
VTh=Vref / 4```

Again, for the Thevenin resistance, we consider the voltage source of this block to be zero. It gives the same Thevenin as the previous because of the exact arrangement and we will replace the concerned portion with equivalent Thevenin values.

```RTh=2R || 2R
RTh=R```

This is the resultant circuit which will be solved in the third stage. The VTh and RTh is as follows:

```VTh= (2R x Vref/4) / 2R+2R
VTh=Vref / 8
RTh=(R+R) || 2R
RTh=R```

The solution depicts that whenever only B0 is connected to the reference voltage and B2=B1=0, the output voltage of the DAC would be Vref/8.

### When only bit B1 is high

The binary code is 010. It will be solved in a similar fashion.The first stage minimizes the interested dotted block. The combination of two 2R resistors is in series with R. The resultant resistance is

`(2R||2R)+R=2R`

The transformation is shown below.

After transforming, the Thevenin equivalents are measured. VTh and RTh turns out to be

```VTh= (2R x Vref) / 2R+2R
VTh=Vref / 2
RTh=(R+R) || 2R
RTh=R```

It is substituted and then the Thevenin equivalents are found for the third time. The left figure is the reduced figure after calculating the second Thevenin values. Rth after shorting the voltage source is

```RTh=(R+R) || 2R
RTh=R```

And VTh,

```VTh= (2R x Vref/2) / 2R+2R
VTh=Vref / 4```

Hence, when B1 is 1 and the other two bits are grounded, the output voltage of the network is Vref/4.

### When MSB Bit is high

Starting from the left side of the circuit, the first three resistors i.e 2R, 2R and R results in the equivalent resistance 2R

`(2R||2R)+R=2R`

And the circuit is reduced to the right figure.

` (2R||2R)+R=2R`

The right figure is again minimized and becomes the left below figure shown below. Now, the Thevenin VTh and RTh is measured and the final Thevenin voltage is Vref/2.

```VTh= (2R x Vref) / 2R+2R
VTh=Vref / 2
RTh=(R+R) || 2R
RTh=R```

Vref/2 is the output voltage of the R-2R Ladder network when MSB is high and the remaining bits are 0.

### When all three bits are high

When all 3 bits are connected to the reference voltage, the output voltage will be the superposition of all three voltages.

```Vr-2r = (Vref / 2)+(Vref / 4)+(Vref / 8)
Vr-2r = 7Vref / 8```

## R-2R Ladder DAC Output Voltage and Transfer Equations

This leads us to the general Vr-2r output voltage equation

`  Vr-2r = Vref{B0/2(N) + B0/2(N-1) + B0/2(N-2) + … + B0/22 + B0/21 }`

Where N is the number of bits.

Vr-2r is applied to the inverting operational amplifier and the output voltage is measured. The output would be 180 degrees out of phase with the input Vr-2r. The following is the general output voltage equation of R-2R DAC

```Vout = -(Rf/R) x Vr-2r
Vout = -(Rf/R){B0/2(N) + B0/2(N-1) + B0/2(N-2) + … + B0/22 + B0/21 }Vref```

The gain of the DAC is decided by the (Rf/R) factor. For unity gain and in-phase output, we can use the buffer amplifier and perform the functions.

### Example

For example, the output voltage generated by 101 binary code with Rf= 4 ohms and R= 2 ohms and Vref = 5V will be

```Vout = -(4/2){1/2(3) + 0/2(2) + 1/21 }(5)
Vout = -6.25V```

As this is a 3-bit DAC, it can have 8 different combinations of binary code, each producing a specific output voltage limited to the reference voltage. The table below provides the output voltage corresponding to every possible3-bit combination.

The table shows the step size is measured to be -1.25 Volts while the full-scale voltage is -8.75 Volts.

• It can be fabricated easily.
• The configuration requires only two resistors with one being twice the other in value instead of a wide range of resistors.
• The output resistance remains the same despite the number of bits.
• Increasing the resolution does not degrade the performance.