In this tutorial I will explain you the working of a simple digital system known as a Flip flop. At the start a brief and concise introduction to flip flops specifically a simplest D flip flop is provided with the explanation of the output they will show. Flip flop is another form of latches which is used to store the memory in two or more states. After that the circuits is simulated using PSPICE and the result are compared with the theoretical discussion provided (which should be same). At the end of the tutorial you are provided with an exercise to do it by yourself, and in the next tutorials I will assume that you have done those exercises and I will not explain the concept regarding them.
Introduction to D flip flop
D flip flop also known as a Master-Slave flip flop is a modified form of a set reset (SR) flip flop. Only the reset side of the flip flop is passed through an inverter as shown in the figure below,
Figure 1: D flip flop
The Q output of the D or Data flip flop will be the same as the input if the enable is 1 and Q will show the previous input if the enable is 0. However, the Q’ output is the inverted form of Q as shown in the truth table below,
Figure 2: Truth table
simulation of D Flip Flip in PSpice
- Lets’ design a simple digital circuit of a flip flop i.e. D flip flop without using the build in block using NAND gates we can also use the combination of AND and NOT gates as I will explain shortly in this tutorial. Open the PSPICE design manager on your PC by typing design manager in the search bar. From the design manager click on the run schematic button to open a new blank schematic as shown in the figure below,
Figure 3: Opening schematic
- After opening the new schematic before jumping into designing first save the schematic by clicking on the file button at the top left corner and then selecting save as so that we can access it anytime in the future. Refer to the figure below,
Figure 4: Saving schematic
- Click on the get new part icon at the top bar of the schematic window in order to search for the components that are needed for circuit designing.
Figure 5: Getting new part
- In the get new part window, type ‘7400’ it will display a NAND gate available in PSPICE. From that list select a simple NAND gate as shown in the figure below,
Figure 6: Placing NAND gate
- If you want to build the circuit shown in the introduction part type ‘7408’ to place an AND gate. Again open the get new part window and in the part name block type STM, select the digital supply from the list given and then click on place & close as shown in the figure below
Figure 7: Placing digital supply
- The placed components in the schematic window are shown in the figure below,
Figure 8: Placed components
- Click on the draw wire icon at the top bar of the schematic window in order to connect the already placed components for circuit designing, as shown in the figure below,
Figure 9: Drawing wire
- Connect all the components to complete the circuit diagram as shown in the figure below,
Figure 10: Complete circuit diagram
- If we are interested in checking the voltage on a specific wire in spite of checking it at a node, double click on the wire and inn the window that appear as a result, type the name of the wire you want to label it with, as shown in the figure below,
Figure 11: Labeling
- The labeled diagram of the D flip flop is shown in the figure below,
Figure 12: Labeled circuit diagrams
- We can also change the name of the device i.e. in this case we have 2 identical sources however each of these have separate purpose. One of the sources are used as inputs of the flip flop and the other is used for the enable of the flip flop. If you want to display the voltage at a specific node of the circuit diagram you can do this by placing a voltage marker at that node. On the top of the schematic window, click on the Voltage/Level Marker button as shown in the figure below,
Figure 13: Voltage marker
- Place it at the output and at the input node also place a voltage marker at the enable of the flip flop as shown in the figure below,
Figure 14: Placed voltage marker
- Next step is to set the attributes of the input digital supply. Double click on the dstm1 supply you connected in the circuit previously and set the input commands of the digital input system as shown in the figure below,
Figure 15: Input attributes
- The commands in the attributes window represents the value of the input at the corresponding time in the command before the space. The COMMAND1 = 0s 0 shows that at time 0s the value of the input dstm is 0 and the COMMAND2 = 1s 1 shows that the value will update to 1 at time 1 second. Similar is the case with COMMAND5 = 4s 0 that at 4 seconds the value of the input will be 0.
- Next step is to set the attributes of the input digital supply. Double click on the dstm2 which is used as the enable source of the flip flop supply you connected in the circuit previously and set the input commands of the digital input system but these commands may or may not be same to the commands of input 1 as shown in the figure below,
Figure 16: Enable attributes
- Next step is to adjust the properties of the simulations in order to produce the graph of the voltage at the marker. Click on analysis and then click on Setup as shown in the figure below
Figure 17: Simulation setup
- A widow will appear, click on the transient block on the window and adjust the properties of the window according to your requirement, refer to the figure below
Figure 18: Transient properties
- The final time of the response is 4ms because we have set the commands for only up to 4ms. Now comes the simulation part, click on the analysis at the top bar of the schematic window and then click on simulate as shown in the figure below,
Figure 19: Simulation
- A schematic window will appear showing the voltage at the output wire and the input source as shown in the figure below,
Figure 20: Output
The output of the schematic is in accordance with the output discussed in the introduction part. The enable will control the output of the flip flop. When the enable is one the Q output of the flip flop will give the input as it is and the Q’ output will give the inverted input and when the enable is zero the Q output will give the previous input value at the output and Q’ output will give the previous inverted input at the output. At the start the red line at the outputs shows that there was no previous input i.e. the input was not assigned any value in the previous state. As the enable is zero in the start the output will be the previous input state which is undefined.
Exercise:
- Design a JK flip flop using the criteria discussed in this tutorial.
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