In this tutorial I will give an explanatory introduction of a microcontroller namely TIVA TM4C123G by Texas instrumentals. We will first give a detail introduction about the processor of the microcontroller after that core, memory and different peripherals available on the microcontroller are explained with the description of features of every port or pin including GPIO pins. After that the data sheet of the microcontroller under consideration is provided and a brief block diagram of the internal connections of the controller are provided.
introduction to Tiva Series TM4C123G LaunchPad
The TMRC123G is a member of the class of high performance 32 bit ARM cortex M4 microcontroller with a broad set of peripherals developed by Texas Instrumentals. The TIVA launchpad has a built in processor clock frequency of up to 80MHz with floating point unit (FPU). The Cortex-M4F processor also supports the tail chaining functionality. It also includes a nested vector interrupt controller (NVIC). The debugging interface used is JTAG and SWD (serial wire debugger) for programming and debugging purposes.
The TM4C123G has a vast variety of applications. It hosts a variety of communication peripherals which can be used to connect all sorts of electronics devices; both sensors and actuators for example IR sensors, motors etc.The TM4C123G is basically a Thumb216/32 bit code that is 26% memory and 25% faster than 32-bit and has a flexible clocking system and can also access real time clock through hibernation module.
TM4C123G microcontroller features
The TM4C123G microcontroller of ARM Cortex-M4F operates at 80MHz clock frequency. The clocked source of the I/O port circuitry of the TIVA board can be enabled using RCGCGPIO register. The clock source of a pin should be disabled if an I/O port is not used to save power.
- 256 kb Flash memory.
- 32 kb single cycle SRAM with internal ROM loaded with TivaWare software.
- 2 kb EEPROM which is fast and saves board space
Battery backed hibernation module:
It has sixteen 32 bit words of battery backed memory and 5mA hibernate current with GPIO (General Purpose Input Output) retention.
It also has on board mounted
- USB 2.0 (OTG / HOST / Device)
- 8 UART ports with IrDA, 9-bit and ISO7816 port
- 6 I2C
- 4 SPI microwire or TI synchronous serial interface
- 2 CAN
On board chips on TM4C123G Tiva launchPad
Two on board chips present on the board are debugger and the microcontroller. The debugger mounted on the board is JTAG or SWD as we will see shortly, and the microcontroller chip mounted on the board is TM4C123G after which the board is named. Refer to the figure below,
Figure 1: On board chips
The pins of the microcontroller as visible from the above figure are internally connected to the output on board ports and the functionality of the pins of the controller is shown in the figure below,
Figure 2: TM4C123G pin-out
There are many registers associated with each of the above I/O ports and they have designated addresses in the memory map. The above addresses are the Base addresses meaning that within that base address we have the registers associated with that port
There are two on board switches (Push button) on the LaunchPad that are connected internally with the GPIO pins, and a toggle switch that is used as a power switch, and another push button that is used to reset or restart the program execution that is already loaded on the board. As shown in the figure below,
Figure 3: On board buttons
SW1 push-button switch is connected to PF0 GPIO pin and SW2 push-button switch is connected to PF4 GPIO pin.
Analog to Digital converters:
It has 2 IMSPS 12-bit SAR ADCs 3 analog and 6 digital comparators, SW and timers.
One on board tri-color LED is also present on the TIVA launchpad which is internally connected to the F port of the GPIO pins, and when enabled the led shows the color of the enabled pin. And also there is a power LED of color green on the board which when on tells the user that the board is turned on. Both the LEDs are highlighted in the figure below.
Figure 4: On board LEDs
GPIO (General Purpose Input Output) TM4C123G microcontroller
It has 0-43 general purpose input output pins. Any GPIO can be used as an external edge or level triggered interrupt, it can initial ADC sampling, can change toggle rate up to CPU clock speed on the advanced high performance bus. Each input pin has a tolerance voltage of 5V in input configuration. Every GPIO pin also have a weak pull up, pull down and open drain.
Most of the GPIO pins in a microcontroller can be configured for an alternate hardware function. It should be noted that only 1 of the alternate functions can be configured at a given time. The user program can switch among different alternate functionality during execution.The general purpose I/O pins are named as port A to port F in TM4C123G microcontroller. The address range of the GPIO pins are given in the table below,
|Port name||Lower address||Upper address|
|GPIO port A||0x40004000||0x40004FFF|
|GPIO port B||0x40005000||0x40005FFF|
|GPIO port C||0x40006000||0x40006FFF|
|GPIO port D||0x40007000||0x40007FFF|
|GPIO port E||0x40024000||0x40024FFF|
|GPIO port F||0x40025000||0x40025FFF|
These ports are designated as PA0-PA7, PB0-PB7, PC0-PC7, PD0-PD7, PE0-PE5, and PF0-PF4. The figure below shows the on board GPIO pins f TIVA.
Figure 5: GPIO pins
Memory protection unit:
It has a built-in feature of generating a memory management fault on incorrect access to region.
Timers of Tiva C Series TM4C123G LaunchPad
- 2 watchdog timers with separate clocks
- 1 SysTick timer, with 24 bit high speed RTOS and other timer
- Six 32bit and six 64 bit general purpose timers.
32 channel mDMA :
It also has two interrupt enabled priority levels and 8, 16 and 32 bit data sizes.
Nested Vector Interrupt controller (NVIC)
The built in nested vector interrupt controller is a vector or stack you can say which contains 7 exceptions (defined by the programmer) and 71 interrupts (to be defined by user) with 8 programmable priority levels. These priority levels decide the priority of the interrupts defined by the user and always have lower priority than the programmer defined exceptions. The figure below show the on board peripherals of TIVA TM4C123G launchpad with good resolution.
Figure 6: TM4C123G launchpad
The data sheet of TIVA TM4C123G ARM based cortex-M4F microcontroller is available online and you can easily access it through the link given below
Data sheet link: http://www.ti.com/lit/ds/symlink/tm4c123gh6pm.pdf
ARM microcontroller Block diagram
The ARM chips have two buses: APB (Advanced Peripheral Bus) and AHB (Advanced High-Performance Bus). The AHB bus is much faster than APB. The AHB allows one clock cycle access to the peripherals. The APB is slower and its access time is minimum of 2 clock cycles.
A high level block diagram of TM4C123G microcontroller is shown n figure below. From the figure it is visible that there are 2 on chip buses AHB and APB, which connect the processor core to the peripherals. These buses are constructed from the system bus using a bus matrix. It should be recalled that this bus matrix is different from the one used inside the processor block. The bus matrix inside the processor block is responsible for connecting the instruction and data buses from the processor core I code D code to system buses.
The advanced peripheral bus (APB) is the low speed bus. The more complex Advanced High performance Bus (AHB) gives improved performance than the APB bus, and should be used for interfacing those peripherals, which require faster data transfer speed. The block diagram also shows different peripherals modules connected to these two buses. It should be noted that only the GPIO and direct memory access (DMA) modules have connectivity available to both buses.
IDE for programming:
The IDE that can be used for programming the TM4C123G is Keil. It allows you to build a programming interface in the language of your desire. You can write a code to be burnt on the microcontroller in the language of your desire as we will see shortly in the upcoming tutorials.